LCMXO2-256ZE-1SG32I
IC FPGA 21 I/O 32QFNS
- 產品分類
- FPGA - 現場可程式化閘陣列
- 封裝
- 32-UFQFN Exposed Pad
- 庫存
- 12,478 件
- 供貨狀態
- 當前數量需確認。
產品屬性
| 製造商 | Lattice Semiconductor Corporation |
|---|---|
| 產品分類 | FPGA - 現場可程式化閘陣列 |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 100°C (TJ) |
| Package | Tray |
| Product status | Active |
| Series | MachXO2 |
| Supplier Device Package | 32-QFN (5x5) |
| Voltage - Supply | 1.14V ~ 1.26V |
| 資料表 | 查看資料表PDF |
採購概覽
LCMXO2-256ZE-1SG32I 的主要供貨及採購資訊。
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LCMXO2-256ZE-1SG32I 詳細描述
Product Overview
The LCMXO2-256ZE-1SG32I is a MachXO2 field programmable gate array from Lattice Semiconductor Corporation. It provides 256 logic elements or cells organized into 32 LABs/CLBs, with 21 user I/O for board-level digital interfacing. The device is supplied in a surface-mount 32-UFQFN exposed pad package, also described as a 32-QFN (5x5) supplier device package. Its supply voltage range is 1.14 V to 1.26 V, and it is rated for a junction operating temperature range of -40 °C to 100 °C.
Key Features
- MachXO2 FPGA with 256 logic elements/cells and 32 LABs/CLBs.
- Provides 21 I/O in a 32-UFQFN exposed pad surface-mount package.
- Operates from a 1.14 V to 1.26 V supply.
- Supports a junction operating temperature range of -40 °C to 100 °C.
- Supplier device package is 32-QFN (5x5).
Applications
- Embedded boards that require programmable logic within the capacity of 256 logic elements/cells and 21 I/O.
- Digital I/O adaptation between board-level signals where 21 I/O are sufficient.
- Space-constrained assemblies using a 32-QFN (5x5) surface-mount package.
Design & Procurement Notes
When selecting the LCMXO2-256ZE-1SG32I, confirm that the required logic fits within 256 logic elements/cells and 32 LABs/CLBs, and that the design does not require more than 21 I/O. The power architecture should provide a supply within 1.14 V to 1.26 V, and thermal planning should consider the -40 °C to 100 °C junction operating temperature range. The 32-UFQFN exposed pad package, with a 32-QFN (5x5) supplier device package, is intended for surface-mount assembly; PCB layout should account for the exposed pad and 32-QFN (5x5) footprint.
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