ICE40LP1K-QN84
IC FPGA 67 I/O 84QFN
- 產品分類
- FPGA - 現場可程式化閘陣列
- 封裝
- 84-VFQFN Dual Rows, Exposed Pad
- 庫存
- 2,834 件
- 供貨狀態
- 當前數量需確認。
產品屬性
| 製造商 | Lattice Semiconductor Corporation |
|---|---|
| 產品分類 | FPGA - 現場可程式化閘陣列 |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 100°C (TJ) |
| Package | Tray |
| Product status | Active |
| Series | iCE40™ LP |
| Supplier Device Package | 84-QFN (7x7) |
| Voltage - Supply | 1.14V ~ 1.26V |
| 資料表 | 查看資料表PDF |
採購概覽
ICE40LP1K-QN84 的主要供貨及採購資訊。
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ICE40LP1K-QN84 詳細描述
Product Overview
The ICE40LP1K-QN84 from Lattice Semiconductor Corporation is an iCE40™ LP field programmable gate array (FPGA) intended for embedded digital logic design. It provides 1280 logic elements or cells, 160 LABs or CLBs, and 65536 total RAM bits, with 67 input/output signals available for system interfacing. The device is supplied in an 84-VFQFN dual-row package with an exposed pad, is mounted by surface-mount technology, and operates from a 1.14V to 1.26V supply while supporting a junction temperature range of -40°C to 100°C.
Key Features
- Field programmable gate array architecture with 1280 logic elements or cells and 160 LABs or CLBs for configurable digital logic.
- 65536 total RAM bits available for on-device storage, buffering, or custom logic resources.
- 67 input/output signals provide the interface count for external connections to configurable logic.
- 84-VFQFN dual-row package with exposed pad and 84-QFN (7x7) device footprint for surface-mount assembly.
- Operates from a 1.14V to 1.26V supply and is rated for a junction temperature range of -40°C to 100°C.
Applications
- Embedded control logic in compact systems that need configurable digital functions and 67 I/O signals.
- Sensor or peripheral data aggregation where custom state machines, interface bridges, or memory buffers are implemented inside programmable logic.
- Board-level logic integration in embedded systems operating across a -40°C to 100°C junction temperature range.
Design & Procurement Notes
Designers should verify that the system power supply can maintain the 1.14V to 1.26V range under load and transient conditions. The 84-VFQFN dual-row package with exposed pad requires a matching PCB land pattern, solder paste design, and thermal management plan. The 67 I/O count, 1280 logic cells, 160 LABs or CLBs, and 65536 RAM bits define the practical capacity for logic, storage, and external interfacing. The -40°C to 100°C junction temperature rating should be considered together with board power dissipation and ambient conditions.
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