MT46H128M16LFDD-48 IT:C
IC DRAM 2GBIT PAR 208MHZ 60VFBGA
- Manufacturer
- Micron Technology Inc.
- Product Category
- Memory ICs
- Package
- 60-VFBGA
- Stock
- 4,173 pcs
- Availability
- Current quantity subject to confirmation.
Product Attributes
| Manufacturer | Micron Technology Inc. |
|---|---|
| Product Category | Memory ICs |
| Access Time | 5 ns |
| Clock Frequency | 208 MHz |
| Memory Format | DRAM |
| Memory Interface | Parallel |
| Memory Organization | 128M x 16 |
| Memory Size | 2Gbit |
| Memory Type | Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 85°C (TA) |
| Package | Bulk |
| Product status | Active |
| Supplier Device Package | 60-VFBGA (8x9) |
| Technology | SDRAM - Mobile LPDDR |
| Voltage - Supply | 1.7V ~ 1.95V |
| Write Cycle Time - Word, Page | 14.4ns |
| Datasheet | View Datasheet PDF |
Procurement Snapshot
Key supply and purchasing information for MT46H128M16LFDD-48 IT:C.
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Detailed Description for MT46H128M16LFDD-48 IT:C
Product Overview
The MT46H128M16LFDD-48 IT:C from Micron Technology Inc. is a volatile DRAM memory IC organized as 128M x 16 bits, providing a 2Gbit memory size in a 60-VFBGA (8x9) surface-mount package. It uses a Mobile LPDDR SDRAM architecture with a parallel interface and operates at a 208 MHz clock frequency. The device has a 5 ns access time and a 14.4 ns word/page write cycle time, with a supply voltage range of 1.7V to 1.95V and an operating temperature range of -40°C to 85°C (TA).
Key Features
- 2Gbit volatile DRAM memory organized as 128M x 16 bits.
- Mobile LPDDR SDRAM technology with a parallel memory interface.
- 208 MHz clock frequency, 5 ns access time, and 14.4 ns word/page write cycle time.
- 1.7V to 1.95V supply voltage range.
- -40°C to 85°C (TA) operating temperature range.
- 60-VFBGA (8x9) surface-mount package.
Applications
- Main memory for mobile computing platforms.
- Data buffering in embedded systems with parallel memory interfaces.
- Memory subsystems for handheld terminals.
Design & Procurement Notes
When selecting the MT46H128M16LFDD-48 IT:C, confirm that the host controller supports a parallel Mobile LPDDR interface at 208 MHz and can meet the 5 ns access time and 14.4 ns word/page write cycle timing. The supply rail must remain within 1.7V to 1.95V, and the PCB layout should accommodate the 60-VFBGA (8x9) surface-mount footprint. Thermal design should account for operation from -40°C to 85°C (TA). The 128M x 16 organization and 2Gbit capacity should be matched to the system memory map and data width requirements.
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